Design Verification Lead Engineer Job In Intel In India, Metro

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Job Details
Job DescriptionPSG PFE is looking for an outstanding and highly motivated experienced design verification (DV) engineer to deliver DV COE milestones as a key part of PSG's imperatives to achieve highest revenues and FPGA technology leadership Deliverables include (but not limited to): - Define, drive, execute design verification strategy for FPGA IP and SOC products to deliver FPGA technology leadership -Ensure the highest quality design verification coverage in the relevant environments (example pre-silicon) - Develop industry-leading testbenches and verification testplans/sequences - Enable best-in-class design verification tools, flows and methodologies to improve engineering execution efficiency - Enhance FPGA design verification flow and drive innovative verification methodologies for continuous design verification and efficiency improvements - Act as subject matter expert in DV COE team and mentor and coach verification engineers to achieve design verification requirements - Collaborate with and influence architecture and design teams for design verification implementation and roadmap.

Qualifications
  • Extensive pre-silicon verification experience in ASIC/FPGA designs, IP development, IP/subsystem/SOC verification
  • Proven track record in pre-silicon verification and driving methodology improvements in IP/SOC level including developing UVM/OVM testbenches, Verification IP and design IP debug, test coding, RAL and system verilog assertion coding, Formal verification, Power-aware verification etc
  • Strong understanding in FPGA/IA architecture, on-chip interfaces, interconnect bus, protocols such as latest PCIe, CXL architecture, AMBA
  • Role model in leading and coaching technical contributors to achieve strong quality and project results
  • Solid stakeholder management, excellent communication skills and ability to work with diverse team across different geography sites to resolve technical and other matters.

  • Ability to handle dynamic environment and ambiguity and act as change agent
  • Minimum Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Inside this Business GroupThe Programmable Solutions Group (PSG) was formed from the acquisition of Altera As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation.

We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potentialOther LocationsIN,KA,BangaloreVN,SG,Ho Chi Minh CityPosting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinanceBenefitsWe offer a total compensation package that ranks among the best in the industry It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.

Find more information about all of our Amazing Benefits here: It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel's offices for various positions and further requiring them to deposit money to be eligible for the interviews We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money We would urge people interested in working for Intel, to apply directly at https://jobsintel.

com/ and not fall prey to unscrupulous elementsYour privacy matters to Intel and we comply with applicable data protection laws We collect and maintain personal information for recruitment related activities and your data will not be used for any other purpose We retain personal information for the periods and purposes set forth in Retention periods can vary significantly based on the type of information and how it is used.

We do not share your personal information with third parties In order for Intel to communicate with you on your application results, by submitting your information and proceeding with this application, you agree and consent that we can collect your personal information You will have the ability to opt-out by informing or at any time selecting unsubscribe found at the bottom of our future marketing communications You have rights to correct, update, request access to or deletion of your personal information as described in In addition, if you wish to update or otherwise make changes to your resume, use to resubmit a new resume.

Working ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site In certain circumstances the work model may change to accommodate business needs
Candidate Profile
Intel is looking for .

Intel is looking for Any Graduate / Post Graduate profile candidates.

Short Job Information


Job Title : Design Verification Lead Engineer
Company Name : Intel
Job Location : India, Metro
Education : Any Graduate / Post Graduate
Category : Computers / IT
Experience : Freshers
Post Date : 04 April, 2023
Last Date : 03 June, 2023
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