Multiple Verification Engineer Job In Boeing In Bangalore

Job Description:
Develop models in System Verilog to verify design implementation and develop and run scripts and Make-files
Analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products
Performs testing and analysis activity to assure compliance to requirements
Performs activities in support of functional verification, simulation, emulation, safety and other technical services/methodologies
Coordinates engineering support throughout the lifecycle of the product.


Develop IP and Sub System modules for Test Bench integration under minimal guidance

Basic Qualifications:
Fresher’s with strong fundamentals upon System Verilog and UVM are eligible to apply
0 to 5 year’s of experience in Digital ASIC/FPGA verification
Knowledge in identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements
In depth knowledge in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc
Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry

Boeing is looking for Any Graduate profile candidates.